
2026 Campus - Emulation Engineer
- Tianjin
- Permanent
- Full-time
- Establish emulation environment using Verilog, C/C++ and scripts.
- Port SoC design to the emulation environment.
- Co-work with IP/SOC design and internal team for any SOC/IP issue analysis.
- Work closely with SW team to resolve any issues during code development.
- MS in EE/Computer Science/Communication.
- Familiar with Verilog or C/C++.
- Scripting - Python preferred. Perl, Tcl, etc.
- Experience on AI assisted design is a plus