Applications Engineering, Sr Staff Engineer
Synopsys
- Beijing Shanghai
- Permanent
- Full-time
We're looking for High Speed Serdes PHY Application Engineer to join the team.This role involves whole SOC design flow from architecture, high speed Interface IP(IIP) integration, synthesis, design for test(DFT), low power design(UPF), CDC/RDC check, static timing analysis(STA), silicon test plan, silicon bring-up and mass production silicon debug. Additionally, you'd:
- Work close with customer to understand new request or customization feature from customer's PRD/MRD
- Provide integration training to customers and conduct reviews on their major SoC milestones
- Provide feedback to Synopsys R&D for customization feature or continuous IIP product improvements
- Participate in IIP design reviews to align development with future customer needs
- Creativity and Innovation is highly inspired: such as developing small tools to simplify daily job or improve efficiency; authoring application notes for gate-level simulation, silicon debug and physical implementation.
- Bachelor's and/or master's degree in electrical and/or Electronic Engineering, Computer Engineering or Computer Science
- Minimum 3 years of IP and/or ASIC Design/Verification/Applications experience is required
- Hands-on experience on RTL coding in Verilog, simulation, synthesis, static timing check, equivalence check, etc.
- Domain knowledge PCI Express, CXL, Ethernet protocols
- Creative, results oriented with the ability to manage multiple tasks concurrently.
- Good verbal and written communication skills in English and ability to interact with customer
- High degree of self-motivation and personal responsibility
- Good inference, reasoning and problem-solving skills, and attention to details
- Synthesis, CDC, RDC, Lint, DFT, STA
- ASIC/SoC tape-out from concept to full production.
- Scripting languages (Tcl, Perl, Python, Excel VBA, etc.)
- Silicon debug and FPGA/hardware troubleshooting skills
- Package, PCB design, SI/PI knowledge will be a plus