ASIC Digital Design, Staff Engineer
Synopsys
- Shanghai
- Permanent
- Full-time
- Bachelor's or master's degree.
- Minimum 3 years of IP or ASIC Design/Verification/Implementation experience required.
- Hands-on experience in RTL coding, verification, synthesis, timing exploration, equivalence check, etc.
- Domain understanding one of the interface standards: PCIe, USB, Display Port, Ethernet, or DDR
- Good communication skills while interacting with internal teams and customers.
- Experience in Design Compiler, Fusion Compiler, Spyglass or VC Spyglass
- Experience in UVM methodology
- Experience in DesignWare Cores
- Experience in TCL, Perl, Python, or other shell scripting