External Manufacturing NPI Engineer (Assembly Packaging)
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- Suzhou, Jiangsu
- Permanent
- Full-time
- Own backend external manufacturing NPI from conceptualization, development, qualification to production launch with a focus on wafer-level packaging (WLP) and post-fab solutions
- Functional Leadership for NPI to deliver PLM requirements for new product commercialization and to co-work with cross functional team (comprising both internal and external stakeholders) to achieve on-time market release
- Drive DFM, technology & manufacturability readiness for new product/ package development, effective POR freeze for new product introduction
- Partner with OSATs to deliver assembly readiness for new product qualification. Key activities include BOM & process setup, risk analysis & mitigation, process characterization, lookahead assessment, qualification and CAB preparation leading to first part release
- Manage production ramp: lead production safe launch, provide technical support to resolve ramp issues, develop CIP, set production baseline for transition into HVM
- Collaborate with internal & external partners for technology pathfinding, package roadmap as well as design rules/ guideline development
- Adoption of data analytics and data-driven approach to problem solving and decision making
- Establish Best Known Methods (BKM) and Best-in-Class practices for new package platform and fan-out to production
- Participate in quality and process readiness audit to achieve production site readiness
- Co-work with operations to drive continuous yield improvement for evolving challenges
- Subject Matter Expert to address arising package and assembly challenges
- Experienced candidate(s) will be considered for technical lead role to manage team activities
- Bachelor's Degree in Engineering/ Materials Science or equivalent technical background
- More than 10 years of experience in backend semiconductor IC manufacturing environment, with in-depth assembly process expertise and shop floor experience
- Hands-on experience in wafer-level packaging (WLP), bumping and post-fab solutions including electroless & electrolytic plating and other surface finishing technology
- Familiar with plating chemistry/ process and material/ metallurgy characterization & microstructural analysis
- Exposure to power device technologies (SiC, JFET, GaN, IGBT, Hybrid etc)
- Prior experience in NPI, product/ process integration and familiar with Chip-to-Package Interaction (CPI) effect
- Experience in IC package design/ CAD/ FEA simulation/ characterization will be advantageous
- Good overall understanding of OSAT business landscape and operations
- Adept at cross-functional collaboration, Adaptable to matrix organization, strong engineering fundamentals (including DOE characterization, SPC, failure analysis) and problem-solving skills
- Strong project management skills and multi-stakeholder management
- Proficient in statistical analysis methods and familiar with data analytics
- Good communication skills and proficient in written & spoken English. Spoken proficiency in Mandarin will be advantageous